Location: Orlando, FL

DESCRIPTION

FIRMWARE DESIGNER LEVEL 3: Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results. Support Circuit card designer with trade studies. Develop and release design requirement specifications for product.

 

NON-EXEMPT
DURATION: 1 Year (02/11/2019) to (02/10/2020)
SHIFT: 1st
PAY UP TO: $75/HR
ADDED DATE: 02/04/2019

 

MANDATORY

• MUST HAVE ACTIVE DOD SECRET CLEARANCE INVESTIGATION WITHIN 5 YEARS
  
•  MUST BE U.S. CITIZEN
  
•  11+ Years FIRMWARE DESIGNER
  
•  Bachelor’s degree or higher in Electrical or Computer Engineering with a preferred concentration in FPGA design and Digital Signal Processing through relevant experience.
  
•   Familiarity with video system design, synchronization, image processing operations and display formats.
  

 

DESIRED

• Experience with Verilog, C/C++, Matlab/Simulink, System Verilog languages; Synopsis Synplify, Synopsis VCS, NCSim, ChipScope tool sets desired
  
• Experience with Xilinx and Altera Part family internal FPGA fabric and IP and model based compilers desired
  
• FPGA design experience with tools noted above. Previous experience related to aerospace design techniques is desired
  

2190 FPGA Engineer -PSCI– Orlando, FL (Active DoD Secret)

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